3x ADC auslesen

[radbruch]

Bei mir (8MHz Mega32) scheint das zu funktionieren:

#include <avr/io.h>
#include <stdlib.h>
#include <inttypes.h>
#include <avr/interrupt.h>
#include <util/delay.h>

volatile unsigned char servopos0, p=0;

#define SERVO_0_PIN 7
#define SERVOPORT PORTC
#define DDRSERVO DDRC

#ifndef F_CPU
#define F_CPU 8000000UL
#endif

void servo_init(void)
{

TIMSK|=(1<<OCIE2); // Interrupt gestatten
TCCR2 |= (1<<WGM21) | (1<<CS20); // CTC-Mode, no prescaling (= wäre sicherer)
OCR2 = F_CPU/100000; // 100000kHz
DDRSERVO |= (1<<SERVO_0_PIN);
}

ISR(TIMER2_COMP_vect)
{
char cSREG;
cSREG = SREG;
static int scount;
if(scount>servopos0)SERVOPORT&=~(1<<SERVO_0_PIN);
else SERVOPORT|=(1<<SERVO_0_PIN);
if(scount<2000)scount++;
else {scount=0; if(p) p--;}
SREG = cSREG;
}

uint16_t readADC(uint8_t channel)
{
	uint16_t result;

   ADCSRA = (1<<ADEN) | (1<<ADPS2) | (1<<ADPS1); // ADC einschalten, prescal /64
   ADMUX = channel; // Kanal wählen
   //ADMUX |= (1<<REFS1) | (1<<REFS0); // + interne 2,56V-Referenz
   ADMUX |= (0<<REFS1) | (1<<REFS0); // + 5V-Referenz
   ADCSRA |= (1<<ADSC); // Konvertierung starten
   while(ADCSRA & (1<<ADSC)); // warten bis Wandlung abgeschlossen

	result= ADC; // Ergebnis zwischspeichern

   ADCSRA &= ~(1<<ADEN); // ADC ausschalten

   return(result); // Ergebnis abliefern
}

/*************** Ausgabe an Terminal *******************************/
#define BAUD_LOW		38400  //Low speed - 38.4 kBaud
#define UBRR_BAUD_LOW	((F_CPU/(16*BAUD_LOW))-1)

void writeChar(char ch)
{
    while (!(UCSRA & (1<<UDRE)));
    UDR = (uint8_t)ch;
}
void writeString(char *string)
{
	while(*string)
		writeChar(*string++);
}
void writeInteger(int16_t number, uint8_t base)
{
	char buffer[17];
	itoa(number, &buffer[0], base);
	writeString(&buffer[0]);
}

/***************************Hauptprogramm***************************/
int main (void)
{

	DDRD = 0xFF;
	//PORTA = 0b00001111;
	uint16_t result0 = 0;
	uint16_t result1 = 0;
	uint16_t result2 = 0;
	uint16_t result3 = 0;
	servo_init();

	// Setup für RP6 (8MHz Mega32)
	// UART:
	UBRRH = UBRR_BAUD_LOW >> 8;	// Setup UART: Baudrate is Low Speed
	UBRRL = (uint8_t) UBRR_BAUD_LOW;
	UCSRA = 0x00;
   UCSRC = (1<<URSEL)|(1<<UCSZ1)|(1<<UCSZ0);
   UCSRB = (1 << TXEN) | (1 << RXEN) | (1 << RXCIE);

	sei();

	while (1)
	{
		servopos0 = 100;
		result0= readADC(0);
		result1= readADC(1);
		//result2= readADC(6);
		result3= readADC(7);

		writeString("ADC0:");
		writeInteger(result0, 10);
		writeString("  ADC1:");
		writeInteger(result1, 10);
		writeString("  ADC7:");
		writeInteger(result3, 10);
		writeChar('\n');
		p=10; while(p);
      }
}

Die Ausgabe:

[READY]
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:947  ADC7:1023
ADC0:765  ADC1:838  ADC7:1023
ADC0:765  ADC1:727  ADC7:1023
ADC0:765  ADC1:616  ADC7:1023
ADC0:765  ADC1:518  ADC7:1023
ADC0:765  ADC1:443  ADC7:1023
ADC0:765  ADC1:388  ADC7:1023
ADC0:765  ADC1:345  ADC7:1023
ADC0:765  ADC1:340  ADC7:1023
ADC0:765  ADC1:323  ADC7:1023
ADC0:765  ADC1:313  ADC7:1023
ADC0:765  ADC1:292  ADC7:1023
ADC0:765  ADC1:279  ADC7:1023
ADC0:765  ADC1:279  ADC7:1023
ADC0:765  ADC1:276  ADC7:1023
ADC0:765  ADC1:279  ADC7:1023
ADC0:765  ADC1:373  ADC7:1023
ADC0:765  ADC1:551  ADC7:1023
ADC0:765  ADC1:722  ADC7:1023
ADC0:765  ADC1:874  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:744
ADC0:765  ADC1:1023  ADC7:547
ADC0:765  ADC1:1023  ADC7:392
ADC0:765  ADC1:1023  ADC7:273
ADC0:765  ADC1:1023  ADC7:190
ADC0:765  ADC1:1023  ADC7:162
ADC0:766  ADC1:1023  ADC7:154
ADC0:766  ADC1:1023  ADC7:173
ADC0:765  ADC1:1023  ADC7:327
ADC0:765  ADC1:1023  ADC7:500
ADC0:765  ADC1:1023  ADC7:668
ADC0:765  ADC1:1023  ADC7:823
ADC0:766  ADC1:1023  ADC7:1023
ADC0:766  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:765  ADC1:1023  ADC7:1023
ADC0:657  ADC1:1023  ADC7:1023
ADC0:506  ADC1:1023  ADC7:1023
ADC0:386  ADC1:1023  ADC7:1023
ADC0:276  ADC1:1023  ADC7:1023
ADC0:124  ADC1:1023  ADC7:1023
ADC0:15  ADC1:1023  ADC7:1023
ADC0:0  ADC1:1023  ADC7:1023
ADC0:0  ADC1:1023  ADC7:1023
ADC0:0  ADC1:1023  ADC7:1023
ADC0:0  ADC1:1023  ADC7:1023
ADC0:0  ADC1:1023  ADC7:1023
ADC0:148  ADC1:1023  ADC7:1023
ADC0:299  ADC1:1023  ADC7:1023
ADC0:432  ADC1:1023  ADC7:1023
ADC0:555  ADC1:1023  ADC7:1023
ADC0:666  ADC1:1023  ADC7:1023
ADC0:759  ADC1:1023  ADC7:1023
ADC0:771  ADC1:1023  ADC7:1023
ADC0:771  ADC1:1023  ADC7:1023
ADC0:771  ADC1:1023  ADC7:1023
ADC0:771  ADC1:1023  ADC7:1023
ADC0:771  ADC1:1023  ADC7:1023
ADC0:770  ADC1:1023  ADC7:1023
ADC0:770  ADC1:1023  ADC7:1023

Gruß

mic