janboejle
21.06.2005, 13:48
test Programm Timer /Counter2-wake up funktionieren nicht richtig
das programm ist einfach:Timer/Counter1 zaehlen 5 Sekunden dann das
controller geht zu sleep Mode, mit Timer/Counter2 soll er wieder aufgewacht wird.
Timer/Counter2 läuft asynchronous
When Timer/Counter2 operates asynchronously, some considerations must be taken.
• Warning: When switching between asynchronous and synchronous clocking of
Timer/Counter2, the timer registers TCNT2, OCR2 and TCCR2 might get corrupted.
A safe procedure for switching clock source is:
1. Disable the Timer/Counter2 interrupts OCIE2 and TOIE2.
2. Select clock source by setting AS2 as appropriate.
3. Write new values to TCNT2, OCR2 and TCCR2.
4. To switch to asynchronous operation: Wait for TCN2UB, OCR2UB and
TCR2UB.
5. Clear the Timer/Counter2 interrupt flags.
6. Clear the TOV2 and OCF2 flags in TIFR.
7. Enable interrupts, if needed.
• When writing to one of the registers TCNT2, OCR2 or TCCR2, the value is
transferred to a temporary register and latched after two positive edges on TOSC1.
The user should not write a new value before the contents of the temporary register
have been transferred to their destination. Each of the three mentioned registers
have their individual temporary register. For example, writing to TCNT2 does not
disturb an OCR2 write in progress. To detect that a transfer to the destination
register has taken place, an Asynchronous Status Register (ASSR) has been
implemented.
• When entering a Power Save Mode after having written to TCNT2, OCR2 or
TCCR2, the user must wait until the written register has been updated if
Timer/Counter2 is used to wake up the device. Otherwise, the MCU will go to sleep
before the changes have had any effect. This is extremely important if the Output
Compare2 interrupt is used to wake up the device; Output Compare is disabled
during write to OCR2 or TCNT2. If the write cycle is not finished (i.e., the user goes
to sleep before the OCR2UB bit returns to zero), the device will never get a compare
match and the MCU will not wake up.
hier ist das Code:
.include"8535def.inc"
.def temp=r16
.def temp2=r17
.def crc8=r24
.org 0X000
rjmp reset ;reset handler
.org 0X008
rjmp TIM1_OVF ;time1 overflow handler
.org 0X004
rjmp TIM2_OVF ; Timer2 Overflow Handler
.equ quartz=7372800 ;Seite 60,64,XTAL->Baudrategenerator
.equ baud=9600
.equ start=65536-39060
.equ highvalue=high(start)
.equ lowvalue=low(start)
reset:
ldi temp,low(RAMEND)
out spl,temp ;Seite 21
ldi temp,high(RAMEND) ;Stackpoint initialisieren
out sph,temp
ldi temp,1<<TOIE1
out TIMSK,temp ;time1 interrupt ein , Seite 27
ldi temp,0b00000101 ;Seite 38
out TCCR1B,temp ;bit2-0 define the Prescaling
sei
loop:
ldi temp,0b11111100
out portb,temp
rjmp loop
sleepe:
ldi temp,1<<SE
out mcucr,temp
ldi temp,(1<<sm0)+(1<<sm1)
out mcucr,temp ;set bit Nr 5 und 4 in mcucr register
sleep
ret
TIM2_OVF:
ldi temp,(0<<OCIE2)+(0<<TOIE2)
out TIMSK,temp
;cbi TIMSK,OCIE2
;cbi TIMSK,TOIE2
ldi temp,1<<as2
out assr,temp
ldi temp,50
out TCNT2,temp
ldi temp,0b11111111
out OCR2,temp ;Timer/Counter2 Output Compare Register
ldi temp,0b00000001
out TCCR2,temp
wait1:
in temp,ASSR
SBRC temp,2 ;tcn2ub
;sbic ASSR,TCN2UB
rjmp wait1
wait2:
in temp,ASSR
SBRC temp,1 ;OCR2UB
;sbic ASSR,OCR2UB
rjmp wait2
wait3:
in temp,ASSR
SBRC temp,0 ;TCR2UB
;sbic ASSR,TCR2UB
rjmp wait3
in temp,TIFR
ldi temp,(1<<OCF2)+(1<<TOV2)
out TIFR,temp
;sbi TIFR,OCF2 OCF2 is cleared by writing a logical “1” to the flag
;sbi TIFR,TOV2 TOV2 is cleared by writing a logical “1” to the flag.
sei
reti
TIM1_OVF:
ldi temp,highvalue
out TCNT1H,temp ;Datenblaette Seite 38
ldi temp,lowvalue ;Startwert des Timers einstellen
out TCNT1L,temp ;39060 Takt ist 5 Sekunde
;nach 5 sekunde ist interrupt ausgeloest
rcall sleepe ;aufrufen Sleep Funktion
reti
das programm ist einfach:Timer/Counter1 zaehlen 5 Sekunden dann das
controller geht zu sleep Mode, mit Timer/Counter2 soll er wieder aufgewacht wird.
Timer/Counter2 läuft asynchronous
When Timer/Counter2 operates asynchronously, some considerations must be taken.
• Warning: When switching between asynchronous and synchronous clocking of
Timer/Counter2, the timer registers TCNT2, OCR2 and TCCR2 might get corrupted.
A safe procedure for switching clock source is:
1. Disable the Timer/Counter2 interrupts OCIE2 and TOIE2.
2. Select clock source by setting AS2 as appropriate.
3. Write new values to TCNT2, OCR2 and TCCR2.
4. To switch to asynchronous operation: Wait for TCN2UB, OCR2UB and
TCR2UB.
5. Clear the Timer/Counter2 interrupt flags.
6. Clear the TOV2 and OCF2 flags in TIFR.
7. Enable interrupts, if needed.
• When writing to one of the registers TCNT2, OCR2 or TCCR2, the value is
transferred to a temporary register and latched after two positive edges on TOSC1.
The user should not write a new value before the contents of the temporary register
have been transferred to their destination. Each of the three mentioned registers
have their individual temporary register. For example, writing to TCNT2 does not
disturb an OCR2 write in progress. To detect that a transfer to the destination
register has taken place, an Asynchronous Status Register (ASSR) has been
implemented.
• When entering a Power Save Mode after having written to TCNT2, OCR2 or
TCCR2, the user must wait until the written register has been updated if
Timer/Counter2 is used to wake up the device. Otherwise, the MCU will go to sleep
before the changes have had any effect. This is extremely important if the Output
Compare2 interrupt is used to wake up the device; Output Compare is disabled
during write to OCR2 or TCNT2. If the write cycle is not finished (i.e., the user goes
to sleep before the OCR2UB bit returns to zero), the device will never get a compare
match and the MCU will not wake up.
hier ist das Code:
.include"8535def.inc"
.def temp=r16
.def temp2=r17
.def crc8=r24
.org 0X000
rjmp reset ;reset handler
.org 0X008
rjmp TIM1_OVF ;time1 overflow handler
.org 0X004
rjmp TIM2_OVF ; Timer2 Overflow Handler
.equ quartz=7372800 ;Seite 60,64,XTAL->Baudrategenerator
.equ baud=9600
.equ start=65536-39060
.equ highvalue=high(start)
.equ lowvalue=low(start)
reset:
ldi temp,low(RAMEND)
out spl,temp ;Seite 21
ldi temp,high(RAMEND) ;Stackpoint initialisieren
out sph,temp
ldi temp,1<<TOIE1
out TIMSK,temp ;time1 interrupt ein , Seite 27
ldi temp,0b00000101 ;Seite 38
out TCCR1B,temp ;bit2-0 define the Prescaling
sei
loop:
ldi temp,0b11111100
out portb,temp
rjmp loop
sleepe:
ldi temp,1<<SE
out mcucr,temp
ldi temp,(1<<sm0)+(1<<sm1)
out mcucr,temp ;set bit Nr 5 und 4 in mcucr register
sleep
ret
TIM2_OVF:
ldi temp,(0<<OCIE2)+(0<<TOIE2)
out TIMSK,temp
;cbi TIMSK,OCIE2
;cbi TIMSK,TOIE2
ldi temp,1<<as2
out assr,temp
ldi temp,50
out TCNT2,temp
ldi temp,0b11111111
out OCR2,temp ;Timer/Counter2 Output Compare Register
ldi temp,0b00000001
out TCCR2,temp
wait1:
in temp,ASSR
SBRC temp,2 ;tcn2ub
;sbic ASSR,TCN2UB
rjmp wait1
wait2:
in temp,ASSR
SBRC temp,1 ;OCR2UB
;sbic ASSR,OCR2UB
rjmp wait2
wait3:
in temp,ASSR
SBRC temp,0 ;TCR2UB
;sbic ASSR,TCR2UB
rjmp wait3
in temp,TIFR
ldi temp,(1<<OCF2)+(1<<TOV2)
out TIFR,temp
;sbi TIFR,OCF2 OCF2 is cleared by writing a logical “1” to the flag
;sbi TIFR,TOV2 TOV2 is cleared by writing a logical “1” to the flag.
sei
reti
TIM1_OVF:
ldi temp,highvalue
out TCNT1H,temp ;Datenblaette Seite 38
ldi temp,lowvalue ;Startwert des Timers einstellen
out TCNT1L,temp ;39060 Takt ist 5 Sekunde
;nach 5 sekunde ist interrupt ausgeloest
rcall sleepe ;aufrufen Sleep Funktion
reti