Waldnebel
24.09.2015, 15:41
Hallo zusammen,
nun da meine Wenigkeit doch recht neu in der PIC Programmierung ist, würde ich mich sehr über etwas Hilfe freuen.
Problem: In Proteus funktioniert alles einwandfrei, auf dem PIC auf / der Schaltung leider nicht.
Anbei die Schaltung und das Programm (in C)
header:
#include <xc.h>
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
// CONFIG1H
#pragma config FOSC = INTIO7 // Oscillator Selection bits (Internal oscillator block, CLKOUT function on OSC2)
#pragma config PLLCFG = OFF // 4X PLL Enable (Oscillator used directly)
#pragma config PRICLKEN = ON // Primary clock enable bit (Primary clock enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRTEN = OFF // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 190 // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config CCP3MX = PORTB5 // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = ON // HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0 // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTB5 // ECCP2 B output mux bit (P2B is on RB5)
#pragma config MCLRE = INTMCLR // MCLR Pin Enable bit (RE3 input pin enabled; MCLR disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
#define _XTAL_FREQ 16000000
__________________________________________________ ____
Main.c
#include "Header.h"
int irFunction (int);
int ventKFunction (int);
int ventBFunction (int);
int videoFunction (int);
int lefzenFunction (int);
void main(void) {
ANSELC = 0b00000000;
TRISA = 0x00;
TRISB = 0x00;
TRISC = 0x00;
LATBbits.LATB2 = 1;
OSCCON = 0b01110000;
int ohrStatus = 0;
int naseStatus = 0;
int lefzenStatus = 0;
int videoStatus = 0;
int irStatus = 0;
int ventKStatus = 0;
int ventBStatus = 0;
LATAbits.LATA0 = 0;
LATAbits.LATA1 = 0;
LATAbits.LATA2 = 0;
LATAbits.LATA3 = 0;
LATAbits.LATA4 = 1;
LATAbits.LATA5 = 0;
LATAbits.LATA6 = 0;
LATAbits.LATA7 = 0;
LATBbits.LATB0 = 0;
LATBbits.LATB1 = 0;
LATBbits.LATB2 = 0;
LATBbits.LATB3 = 0;
LATBbits.LATB4 = 0;
LATBbits.LATB5 = 0;
LATBbits.LATB6 = 0;
LATBbits.LATB7 = 0;
LATCbits.LATC0 = 0;
LATCbits.LATC1 = 0;
LATCbits.LATC2 = 0;
LATCbits.LATC3 = 0;
LATCbits.LATC4 = 0;
LATCbits.LATC5 = 0;
LATCbits.LATC6 = 0;
LATCbits.LATC7 = 0;
while (1)
{
irStatus = irFunction (irStatus);
ventKStatus = ventKFunction(ventKStatus);
ventBStatus = ventBFunction(ventBStatus);
videoStatus = videoFunction(videoStatus);
lefzenStatus = lefzenFunction(lefzenStatus);
}
return;
}
int irFunction (int i)
{
if (PORTCbits.RC5==1 && i == 0)
{
LATBbits.LATB2 = 1;
i = 1;
} else if (PORTCbits.RC5 == 1 && i == 1)
{
LATBbits.LATB2 = 0;
i = 0;
}
while(PORTCbits.RC5==1)
__delay_ms(10);
return i;
}
int ventKFunction (int i)
{
if (PORTCbits.RC6==1 && i == 0)
{
LATBbits.LATB1 = 1;
i = 1;
} else if (PORTCbits.RC6 == 1 && i == 1)
{
LATBbits.LATB1 = 0;
i = 0;
}
while(PORTCbits.RC6==1)
__delay_ms(10);
return i;
}
int ventBFunction (int i)
{
if (PORTCbits.RC7==1 && i == 0)
{
LATBbits.LATB0 = 1;
i = 1;
} else if (PORTCbits.RC7 == 1 && i == 1)
{
LATBbits.LATB0 = 0;
i = 0;
}
while(PORTCbits.RC7==1)
__delay_ms(10);
return i;
}
int videoFunction (int i)
{
if (PORTCbits.RC4==1 && i == 0)
{
LATAbits.LATA4 = 0;
LATAbits.LATA3 = 1;
//Channel
LATAbits.LATA0 = 1;
LATAbits.LATA1 = 0;
LATAbits.LATA2 = 0;
i = 1;
} else if (PORTCbits.RC4==1 && i == 1)
{
LATAbits.LATA0 = 0;
LATAbits.LATA1 = 1;
LATAbits.LATA2 = 0;
i = 2;
} else if (PORTCbits.RC4==1 && i == 2)
{
LATAbits.LATA0 = 1;
LATAbits.LATA1 = 1;
LATAbits.LATA2 = 0;
i = 3;
} else if (PORTCbits.RC4==1 && i == 3)
{
LATAbits.LATA0 = 0;
LATAbits.LATA1 = 0;
LATAbits.LATA2 = 0;
LATAbits.LATA3 = 0;
LATAbits.LATA4 = 1;
i = 0;
}
while(PORTCbits.RC4==1)
__delay_ms(10);
return i;
}
int lefzenFunction (int i)
{
if (PORTCbits.RC3==1 && i == 0)
{
for (int abfolge = 0; abfolge < 50; abfolge++)
{
LATBbits.LATB5 = 1;
__delay_us(1500);
LATBbits.LATB5 = 0;
__delay_ms(18);
}
i = 1;
} else if (PORTCbits.RC3==1 && i == 1)
{
for (int abfolge = 0; abfolge < 50; abfolge++)
{
LATBbits.LATB5 = 1;
__delay_us(700);
LATBbits.LATB5 = 0;
__delay_ms(19);
}
i = 0;
}
while(PORTCbits.RC3==1)
__delay_ms(10);
return i;
}
Teilweise schalten die Transistoren durch ohne das irgendwas aktiviert ist und das Entprellen der Taster scheint auch nicht zu laufen.
Ich wär für jede Hilfe sehr dankbar!
Viele Grüße
Waldnebel
nun da meine Wenigkeit doch recht neu in der PIC Programmierung ist, würde ich mich sehr über etwas Hilfe freuen.
Problem: In Proteus funktioniert alles einwandfrei, auf dem PIC auf / der Schaltung leider nicht.
Anbei die Schaltung und das Programm (in C)
header:
#include <xc.h>
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
// CONFIG1H
#pragma config FOSC = INTIO7 // Oscillator Selection bits (Internal oscillator block, CLKOUT function on OSC2)
#pragma config PLLCFG = OFF // 4X PLL Enable (Oscillator used directly)
#pragma config PRICLKEN = ON // Primary clock enable bit (Primary clock enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRTEN = OFF // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 190 // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config CCP3MX = PORTB5 // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = ON // HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0 // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTB5 // ECCP2 B output mux bit (P2B is on RB5)
#pragma config MCLRE = INTMCLR // MCLR Pin Enable bit (RE3 input pin enabled; MCLR disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
#define _XTAL_FREQ 16000000
__________________________________________________ ____
Main.c
#include "Header.h"
int irFunction (int);
int ventKFunction (int);
int ventBFunction (int);
int videoFunction (int);
int lefzenFunction (int);
void main(void) {
ANSELC = 0b00000000;
TRISA = 0x00;
TRISB = 0x00;
TRISC = 0x00;
LATBbits.LATB2 = 1;
OSCCON = 0b01110000;
int ohrStatus = 0;
int naseStatus = 0;
int lefzenStatus = 0;
int videoStatus = 0;
int irStatus = 0;
int ventKStatus = 0;
int ventBStatus = 0;
LATAbits.LATA0 = 0;
LATAbits.LATA1 = 0;
LATAbits.LATA2 = 0;
LATAbits.LATA3 = 0;
LATAbits.LATA4 = 1;
LATAbits.LATA5 = 0;
LATAbits.LATA6 = 0;
LATAbits.LATA7 = 0;
LATBbits.LATB0 = 0;
LATBbits.LATB1 = 0;
LATBbits.LATB2 = 0;
LATBbits.LATB3 = 0;
LATBbits.LATB4 = 0;
LATBbits.LATB5 = 0;
LATBbits.LATB6 = 0;
LATBbits.LATB7 = 0;
LATCbits.LATC0 = 0;
LATCbits.LATC1 = 0;
LATCbits.LATC2 = 0;
LATCbits.LATC3 = 0;
LATCbits.LATC4 = 0;
LATCbits.LATC5 = 0;
LATCbits.LATC6 = 0;
LATCbits.LATC7 = 0;
while (1)
{
irStatus = irFunction (irStatus);
ventKStatus = ventKFunction(ventKStatus);
ventBStatus = ventBFunction(ventBStatus);
videoStatus = videoFunction(videoStatus);
lefzenStatus = lefzenFunction(lefzenStatus);
}
return;
}
int irFunction (int i)
{
if (PORTCbits.RC5==1 && i == 0)
{
LATBbits.LATB2 = 1;
i = 1;
} else if (PORTCbits.RC5 == 1 && i == 1)
{
LATBbits.LATB2 = 0;
i = 0;
}
while(PORTCbits.RC5==1)
__delay_ms(10);
return i;
}
int ventKFunction (int i)
{
if (PORTCbits.RC6==1 && i == 0)
{
LATBbits.LATB1 = 1;
i = 1;
} else if (PORTCbits.RC6 == 1 && i == 1)
{
LATBbits.LATB1 = 0;
i = 0;
}
while(PORTCbits.RC6==1)
__delay_ms(10);
return i;
}
int ventBFunction (int i)
{
if (PORTCbits.RC7==1 && i == 0)
{
LATBbits.LATB0 = 1;
i = 1;
} else if (PORTCbits.RC7 == 1 && i == 1)
{
LATBbits.LATB0 = 0;
i = 0;
}
while(PORTCbits.RC7==1)
__delay_ms(10);
return i;
}
int videoFunction (int i)
{
if (PORTCbits.RC4==1 && i == 0)
{
LATAbits.LATA4 = 0;
LATAbits.LATA3 = 1;
//Channel
LATAbits.LATA0 = 1;
LATAbits.LATA1 = 0;
LATAbits.LATA2 = 0;
i = 1;
} else if (PORTCbits.RC4==1 && i == 1)
{
LATAbits.LATA0 = 0;
LATAbits.LATA1 = 1;
LATAbits.LATA2 = 0;
i = 2;
} else if (PORTCbits.RC4==1 && i == 2)
{
LATAbits.LATA0 = 1;
LATAbits.LATA1 = 1;
LATAbits.LATA2 = 0;
i = 3;
} else if (PORTCbits.RC4==1 && i == 3)
{
LATAbits.LATA0 = 0;
LATAbits.LATA1 = 0;
LATAbits.LATA2 = 0;
LATAbits.LATA3 = 0;
LATAbits.LATA4 = 1;
i = 0;
}
while(PORTCbits.RC4==1)
__delay_ms(10);
return i;
}
int lefzenFunction (int i)
{
if (PORTCbits.RC3==1 && i == 0)
{
for (int abfolge = 0; abfolge < 50; abfolge++)
{
LATBbits.LATB5 = 1;
__delay_us(1500);
LATBbits.LATB5 = 0;
__delay_ms(18);
}
i = 1;
} else if (PORTCbits.RC3==1 && i == 1)
{
for (int abfolge = 0; abfolge < 50; abfolge++)
{
LATBbits.LATB5 = 1;
__delay_us(700);
LATBbits.LATB5 = 0;
__delay_ms(19);
}
i = 0;
}
while(PORTCbits.RC3==1)
__delay_ms(10);
return i;
}
Teilweise schalten die Transistoren durch ohne das irgendwas aktiviert ist und das Entprellen der Taster scheint auch nicht zu laufen.
Ich wär für jede Hilfe sehr dankbar!
Viele Grüße
Waldnebel