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BioSniper
23.05.2011, 17:14
Dieser Code funktioniert, der PIC arbeitet mit 31250 Hz:



OSCCONbits.SCS1 = 1;

OSCCONbits.IRCF0 = 0;
OSCCONbits.IRCF1 = 0;
OSCCONbits.IRCF2 = 0;

OSCTUNEbits.INTSRC = 1;

//INTSRC: Internal Oscillator Low-Frequency Source Select bit
//1: 31.25 kHz device clock derived from 16 MHz HFINTOSC source (divide-by-512)
//0: 31.00 kHz device clock derived directly from LFINTOSC internal oscillator
Dieser Code funktioniert nicht, der PIC rührt sich nicht, obwohl die Bedingungen erfüllt wurden:



OSCCONbits.SCS1 = 1;

OSCCONbits.IRCF0 = 0;
OSCCONbits.IRCF1 = 0;
OSCCONbits.IRCF2 = 0;

OSCTUNEbits.INTSRC = 0;

//INTSRC: Internal Oscillator Low-Frequency Source Select bit
//1: 31.25 kHz device clock derived from 16 MHz HFINTOSC source (divide-by-512)
//0: 31.00 kHz device clock derived directly from LFINTOSC internal oscillator
Hier noch meine Config:



#pragma config FOSC = IRC //POR => Internal RC oscillator.
#pragma config PLLEN = OFF //PLL is ENABLED.
#pragma config CPUDIV = NOCLKDIV //No CPU System Clock divide.
#pragma config HFOFST = OFF //Warten bis System-clock stabil.
#pragma config PCLKEN = OFF //Primary clock is under software control.
#pragma config FCMEN = OFF //Fail-Safe Clock Monitor disabled.

#pragma config PWRTEN = ON //Power-UP-Timer enabled.
#pragma config MCLRE = ON //MCLR pin enabled, RA3 input pin disabled.

#pragma config BOREN = ON //Brown-out Reset enabled.
#pragma config BORV = 30 //VBOR set to 3.0V
/*
#pragma config BORV = 27 //VBOR set to 2.7V
#pragma config BORV = 22 //VBOR set to 2.2V
#pragma config BORV = 19 //VBOR set to 1.9V
*/

#pragma config IESO = OFF //Oscillator Switchover mode disabled.
#pragma config LVP = OFF //Low Voltage ICSP.
#pragma config STVREN = OFF //Stack full/underflow will not cause Reset.
#pragma config WDTEN = OFF //Watchdog Timer OFF.

#pragma config BBSIZ = OFF //1kW boot block size.
#pragma config EBTR0 = OFF //Block 0 not prot. from table reads exec. in other blocks.
#pragma config EBTR1 = OFF //Block 1 not prot. from table reads exec. in other blocks.
#pragma config EBTRB = OFF //Boot block not prot. from table reads exec. in other blocks.

#pragma config WRT0 = OFF //Block 0 not write-protected.
#pragma config WRT1 = OFF //Block 1 not write-protected.
#pragma config WRTB = OFF //Boot block not write-protected.
#pragma config WRTC = OFF //Configuration registers not write-protected.
#pragma config WRTD = OFF //Data EEPROM not write-protected.

//CPn-Bit's schützen vor externen Read/Write angriffen.
#pragma config CP0 = OFF //OFF: Block 0 not code-protected.
#pragma config CP1 = OFF //OFF: Block 1 not code-protected.
#pragma config CPB = OFF //OFF: Boot block not code-protected.
#pragma config CPD = OFF //OFF: Data EEPROM not code-protected.

#pragma config XINST = OFF //Instruction set extension & Indexed Addr. mode disabled.
Danke für die Hilfe.

BioSniper
23.05.2011, 17:34
Hab' den Fehler eben selbst gefunden:



while (OSCCONbits.IOFS == 0) ; //Warten bis Frequenz stabil.
Diese Abfrage kann man nur für HFINTOSC machen. Der PIC lief, aber hat sich an dieser Zeile aufgehängt.

Immerhin weiss ich jetzt, dass HFINTOSC tatsächlich abgeschaltet ist.