wkrug
10.11.2010, 17:09
Hallo Forumsmitglieder,
ich hab für mein nächstes Projekt für MiDi einen ATMEGA 1280 mit 4 USARTS geplant.
Ein Teil des Quellcodes ist auch schon fertig.
Wenn ich den fertigen Programmteil im Simulator mit dem .cof ( Objektfile ) simulieren will, wird bei gesetzten RXD Interrupt Flags an USART 2 und USART 3 kein! Interrupt ausgelöst.
Mach ich das gleiche mit den RXD Interrupts beim USART0 und USART1 funktioniert es.
Hardware zum Live testen hab ich leider noch nicht. Das Ganze ist noch in der Entwicklungsphase.
Ich vermute einen Fehler im AVR Studio 4, da auch im Disassembler Mode kein Sprung zur Interruptroutine stattfindet.
Ich hab auch schon die aktuellste Version vom Studio4 4.18 Built 716 runtergeladen. Der Fehler blieb!
Ich weiß, das ist ein sehr spezielles Problem, eventuell hab ich ja auch bei der Initialisierung der USARTs oder eines anderen Controllerteils was vergessen.
Der Code wurde mit CodeVision AVR 1.25.5 erzeugt - falls das eine Rolle spielt.
#include <mega1280.h>
// Alphanumeric LCD Module functions
#asm
.equ __lcd_port=0x02 ;PORTA
#endasm
#include <lcd.h>
// Declare your global variables here
// USART0 Transmitter buffer
#define TX_BUFFER_SIZE0 64
char tx_buffer0[TX_BUFFER_SIZE0];
#if TX_BUFFER_SIZE0<256
unsigned char tx_wr_index0,tx_rd_index0,tx_counter0;
#else
unsigned int tx_wr_index0,tx_rd_index0,tx_counter0;
#endif
//Kommandodefinitionen
//Channel Kommandos
#define note_off 0x80
#define note_on 0x90
#define key_touch 0xA0
#define control_change 0xB0
#define program_change 0xC0
#define keyboard_touch 0xD0
#define pitch_wheel 0xE0
//Poly Kommandos
#define sys_ex 0xF0
#define time_code 0xF1
#define song_pointer 0xF2
#define song_select 0xF3
#define ndef1 0xF4
#define ndef2 0xF5
#define tune_req 0xF6
#define endsys_ex 0xF7
//Realtime Kommandos
#define r_timing_clock 0xF8
#define r_ndef1 0xF9
#define r_start 0xFA
#define r_continue 0xFB
#define r_stop 0xFC
#define r-ndef2 0xFD
#define r_active_sensing 0xFE
#define r_system_reset 0xFF
//MiDi Variablen
volatile unsigned char uc_lastsend; //Letztes gesendetes Kommando
volatile unsigned char uc_lastrec1; //Letztes empfangenes Kommando Kanal 1
volatile unsigned char uc_lastrec2; //Letztes empfangenes Kommando Kanal 2
volatile unsigned char uc_lastrec3; //Letztes empfangenes Kommando Kanal 3
volatile unsigned char uc_lastrec4; //Letztes empfangenes Kommando Kanal 4
volatile unsigned char uc_sysex_state=0; //SYSTEM EXCLUSIVE Status 0=aus, 1=Kanal1, 2=Kanal2, 3=Kanal3, 4=Kanal4 + 10 = Ende
volatile bit ub_sensing; //Active Sensing am Output aktiv = 1
eeprom unsigned char ee_sensing=0;
//Display Variablen
volatile unsigned char uc_line1[22],uc_line2[22];
//Tastatur Variablen
//Statistik Variablen
volatile unsigned long int li_error1,li_error2,li_error3,li_error4;
volatile unsigned long int li_chan1,li_chan2,li_chan3,li_chan4;
volatile unsigned long int li_com1,li_com2,li_com3,li_com4;
volatile unsigned long int li_real1,li_real2,li_real3,li_real4;
//Puffer
volatile unsigned char uc_inbuffer1[3],uc_inbuffer2[3],uc_inbuffer3[3],uc_inbuffer4[3]; //Nachrichtenpuffer für die Eingänge
volatile unsigned char uc_inpointer1=0,uc_inpointer2=0,uc_inpointer3=0,uc _inpointer4=0; //Pointer für die Nachrichtenpuffer
volatile unsigned char uc_bufferlen1,uc_bufferlen2,uc_bufferlen3,uc_buffe rlen4; //Speicher für benötigte Pufferlänge
volatile unsigned char uc_sysex_buffer[1024]; //Puffer für MiDi Eingaben bei SYSTEM Exclusive Betrieb
volatile unsigned int ui_sysexinpointer; //Zeiger zum Einlesen von SYSTEM EXCLUSIVE Puffer Daten
volatile bit ub_sysex_overflow=0; //Sysex Puffer ist übergelaufen
// External Interrupt 0 service routine
interrupt [INT0] void ext_int0_isr(void)
{
// Place your code here
}
// External Interrupt 1 service routine
interrupt [INT1] void ext_int1_isr(void)
{
// Place your code here
}
#define RXB8 1
#define TXB8 0
#define UPE 2
#define OVR 3
#define FE 4
#define UDRE 5
#define RXC 7
#define FRAMING_ERROR (1<<FE)
#define PARITY_ERROR (1<<UPE)
#define DATA_OVERRUN (1<<OVR)
#define DATA_REGISTER_EMPTY (1<<UDRE)
#define RX_COMPLETE (1<<RXC)
// System Exclusive Puffer Einlesehandler
void sysexin(unsigned char uc_data)
{
if(ui_sysexinpointer<1024)
{
uc_sysex_buffer[ui_sysexinpointer]=uc_data;
ui_sysexinpointer++;
ub_sysex_overflow=0;
}
else
{
ub_sysex_overflow=1;
}
}
// USART0 Receiver interrupt service routine
interrupt [USART0_RXC] void usart0_rx_isr(void)
{
char status,data;
status=UCSR0A;
data=UDR0;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Place Code here
};
}
// USART0 Transmitter interrupt service routine
interrupt [USART0_TXC] void usart0_tx_isr(void)
{
if (tx_counter0)
{
--tx_counter0;
UDR0=tx_buffer0[tx_rd_index0];
if (++tx_rd_index0 == TX_BUFFER_SIZE0) tx_rd_index0=0;
};
}
#ifndef _DEBUG_TERMINAL_IO_
// Write a character to the USART0 Transmitter buffer
#define _ALTERNATE_PUTCHAR_
#pragma used+
void putchar(char c)
{
while (tx_counter0 == TX_BUFFER_SIZE0);
#asm("cli")
if (tx_counter0 || ((UCSR0A & DATA_REGISTER_EMPTY)==0))
{
tx_buffer0[tx_wr_index0]=c;
if (++tx_wr_index0 == TX_BUFFER_SIZE0) tx_wr_index0=0;
++tx_counter0;
}
else
UDR0=c;
#asm("sei")
}
#pragma used-
#endif
// USART1 Receiver interrupt service routine for Midi Input 2
interrupt [USART1_RXC] void usart1_rx_isr(void)
{
char status,data,uc_i;
status=UCSR1A;
data=UDR1;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Code hier
}
else
{
li_error2++;
}
}
// USART2 Receiver interrupt service routine
interrupt [USART2_RXC] void usart2_rx_isr(void)
{
char status,data;
status=UCSR2A;
data=UDR2;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Place Code here
};
}
// USART3 Receiver interrupt service routine
interrupt [USART3_RXC] void usart3_rx_isr(void)
{
char status,data,uc_i;
status=UCSR3A;
data=UDR3;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Code hier
}
else
{
li_error4++;
}
}
// Standard Input/Output functions
#include <stdio.h>
// Timer 0 overflow interrupt service routine
interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{
// Place your code here
}
// System Exclusive Puffer leeren und an die MiDi Out Schnittstelle ausgeben
void sendsysexbuffer(void)
{
unsigned int ui_sysexoutpointer; //Zeiger zum Auslesen von SYSTEM EXCLUSIVE Puffer Daten
for(ui_sysexoutpointer=0;ui_sysexinpointer>ui_sysexoutpointer;ui_sysexoutpointer++)
{
while(tx_counter0>=(TX_BUFFER_SIZE0-16)) //Warten bei vollem Sendepuffer
{
#asm("nop");
}
putchar(uc_sysex_buffer[ui_sysexoutpointer]);
if(ui_sysexinpointer<ui_sysexoutpointer+2)
{
#asm("cli"); //Falls nur noch ein Byte im Puffer ist Interrupts sperren
}
}
uc_sysex_state=0; //Am Ende den Sysex Puffer wieder umschalten
#asm("sei") //Interrupts wieder freigeben
ub_sysex_overflow=0; //Eventuell vorhandenes Overflow Bit löschen
}
void main(void)
{
// Declare your local variables here
// Crystal Oscillator division factor: 1
#pragma optsize-
CLKPR=0x80;
CLKPR=0x00;
#ifdef _OPTIMIZE_SIZE_
#pragma optsize+
#endif
// Input/Output Ports initialization
// Port A initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTA=0x00;
DDRA=0x00;
// Port B initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTB=0x00;
DDRB=0x00;
// Port C initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=P State2=P State1=P State0=P
PORTC=0x0F;
DDRC=0x00;
// Port D initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTD=0x00;
DDRD=0x00;
// Port E initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTE=0x00;
DDRE=0x00;
// Port F initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTF=0x00;
DDRF=0x00;
// Port G initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTG=0x00;
DDRG=0x00;
// Port H initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTH=0x00;
DDRH=0x00;
// Port J initialization
// Func7=In Func6=Out Func5=Out Func4=Out Func3=Out Func2=In Func1=In Func0=In
// State7=T State6=0 State5=0 State4=0 State3=0 State2=T State1=T State0=T
PORTJ=0x00;
DDRJ=0x78;
// Port K initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTK=0x00;
DDRK=0x00;
// Port L initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTL=0x00;
DDRL=0x00;
// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: 250,000 kHz
// Mode: Normal top=FFh
// OC0A output: Disconnected
// OC0B output: Disconnected
TCCR0A=0x00;
TCCR0B=0x03;
TCNT0=0x00;
OCR0A=0x00;
OCR0B=0x00;
// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: Timer 1 Stopped
// Mode: Normal top=FFFFh
// OC1A output: Discon.
// OC1B output: Discon.
// OC1C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR1A=0x00;
TCCR1B=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;
OCR1CH=0x00;
OCR1CL=0x00;
// Timer/Counter 2 initialization
// Clock source: System Clock
// Clock value: Timer 2 Stopped
// Mode: Normal top=FFh
// OC2A output: Disconnected
// OC2B output: Disconnected
ASSR=0x00;
TCCR2A=0x00;
TCCR2B=0x00;
TCNT2=0x00;
OCR2A=0x00;
OCR2B=0x00;
// Timer/Counter 3 initialization
// Clock source: System Clock
// Clock value: Timer 3 Stopped
// Mode: Normal top=FFFFh
// Noise Canceler: Off
// Input Capture on Falling Edge
// OC3A output: Discon.
// OC3B output: Discon.
// OC3C output: Discon.
// Timer 3 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR3A=0x00;
TCCR3B=0x00;
TCNT3H=0x00;
TCNT3L=0x00;
ICR3H=0x00;
ICR3L=0x00;
OCR3AH=0x00;
OCR3AL=0x00;
OCR3BH=0x00;
OCR3BL=0x00;
OCR3CH=0x00;
OCR3CL=0x00;
// Timer/Counter 4 initialization
// Clock source: System Clock
// Clock value: Timer 4 Stopped
// Mode: Normal top=FFFFh
// OC4A output: Discon.
// OC4B output: Discon.
// OC4C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 4 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR4A=0x00;
TCCR4B=0x00;
TCNT4H=0x00;
TCNT4L=0x00;
ICR4H=0x00;
ICR4L=0x00;
OCR4AH=0x00;
OCR4AL=0x00;
OCR4BH=0x00;
OCR4BL=0x00;
OCR4CH=0x00;
OCR4CL=0x00;
// Timer/Counter 5 initialization
// Clock source: System Clock
// Clock value: Timer 5 Stopped
// Mode: Normal top=FFFFh
// OC5A output: Discon.
// OC5B output: Discon.
// OC5C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 5 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR5A=0x00;
TCCR5B=0x00;
TCNT5H=0x00;
TCNT5L=0x00;
ICR5H=0x00;
ICR5L=0x00;
OCR5AH=0x00;
OCR5AL=0x00;
OCR5BH=0x00;
OCR5BL=0x00;
OCR5CH=0x00;
OCR5CL=0x00;
// External Interrupt(s) initialization
// INT0: On
// INT0 Mode: Rising Edge
// INT1: On
// INT1 Mode: Rising Edge
// INT2: Off
// INT3: Off
// INT4: Off
// INT5: Off
// INT6: Off
// INT7: Off
EICRA=0x0F;
EICRB=0x00;
EIMSK=0x03;
EIFR=0x03;
// PCINT0 interrupt: Off
// PCINT1 interrupt: Off
// PCINT2 interrupt: Off
// PCINT3 interrupt: Off
// PCINT4 interrupt: Off
// PCINT5 interrupt: Off
// PCINT6 interrupt: Off
// PCINT7 interrupt: Off
// PCINT8 interrupt: Off
// PCINT9 interrupt: Off
// PCINT10 interrupt: Off
// PCINT11 interrupt: Off
// PCINT12 interrupt: Off
// PCINT13 interrupt: Off
// PCINT14 interrupt: Off
// PCINT15 interrupt: Off
// PCINT16 interrupt: Off
// PCINT17 interrupt: Off
// PCINT18 interrupt: Off
// PCINT19 interrupt: Off
// PCINT20 interrupt: Off
// PCINT21 interrupt: Off
// PCINT22 interrupt: Off
// PCINT23 interrupt: Off
PCMSK0=0x00;
PCMSK1=0x00;
PCMSK2=0x00;
PCICR=0x00;
// Timer/Counter 0 Interrupt(s) initialization
TIMSK0=0x01;
// Timer/Counter 1 Interrupt(s) initialization
TIMSK1=0x00;
// Timer/Counter 2 Interrupt(s) initialization
TIMSK2=0x00;
// Timer/Counter 3 Interrupt(s) initialization
TIMSK3=0x00;
// Timer/Counter 4 Interrupt(s) initialization
TIMSK4=0x00;
// Timer/Counter 5 Interrupt(s) initialization
TIMSK5=0x00;
// USART0 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART0 Receiver: On
// USART0 Transmitter: On
// USART0 Mode: Asynchronous
// USART0 Baud Rate: 31250
UCSR0A=0x00;
UCSR0B=0xD8;
UCSR0C=0x06;
UBRR0H=0x00;
UBRR0L=0x1F;
// USART1 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART1 Receiver: On
// USART1 Transmitter: Off
// USART1 Mode: Asynchronous
// USART1 Baud Rate: 31250
UCSR1A=0x00;
UCSR1B=0x90;
UCSR1C=0x06;
UBRR1H=0x00;
UBRR1L=0x1F;
// USART2 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART2 Receiver: On
// USART2 Transmitter: Off
// USART2 Mode: Asynchronous
// USART2 Baud Rate: 31250
UCSR2A=0x00;
UCSR2B=0x90;
UCSR2C=0x06;
UBRR2H=0x00;
UBRR2L=0x1F;
// USART3 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART3 Receiver: On
// USART3 Transmitter: Off
// USART3 Mode: Asynchronous
// USART3 Baud Rate: 31250
UCSR3A=0x00;
UCSR3B=0x90;
UCSR3C=0x06;
UBRR3H=0x00;
UBRR3L=0x1F;
// Analog Comparator initialization
// Analog Comparator: Off
// Analog Comparator Input Capture by Timer/Counter 1: Off
ACSR=0x80;
ADCSRB=0x00;
// LCD module initialization
//lcd_init(20);
// Global enable interrupts
#asm("sei")
while (1)
{
if(uc_sysex_state>10)
{
sendsysexbuffer();
}
// Place your code here
};
}
ich hab für mein nächstes Projekt für MiDi einen ATMEGA 1280 mit 4 USARTS geplant.
Ein Teil des Quellcodes ist auch schon fertig.
Wenn ich den fertigen Programmteil im Simulator mit dem .cof ( Objektfile ) simulieren will, wird bei gesetzten RXD Interrupt Flags an USART 2 und USART 3 kein! Interrupt ausgelöst.
Mach ich das gleiche mit den RXD Interrupts beim USART0 und USART1 funktioniert es.
Hardware zum Live testen hab ich leider noch nicht. Das Ganze ist noch in der Entwicklungsphase.
Ich vermute einen Fehler im AVR Studio 4, da auch im Disassembler Mode kein Sprung zur Interruptroutine stattfindet.
Ich hab auch schon die aktuellste Version vom Studio4 4.18 Built 716 runtergeladen. Der Fehler blieb!
Ich weiß, das ist ein sehr spezielles Problem, eventuell hab ich ja auch bei der Initialisierung der USARTs oder eines anderen Controllerteils was vergessen.
Der Code wurde mit CodeVision AVR 1.25.5 erzeugt - falls das eine Rolle spielt.
#include <mega1280.h>
// Alphanumeric LCD Module functions
#asm
.equ __lcd_port=0x02 ;PORTA
#endasm
#include <lcd.h>
// Declare your global variables here
// USART0 Transmitter buffer
#define TX_BUFFER_SIZE0 64
char tx_buffer0[TX_BUFFER_SIZE0];
#if TX_BUFFER_SIZE0<256
unsigned char tx_wr_index0,tx_rd_index0,tx_counter0;
#else
unsigned int tx_wr_index0,tx_rd_index0,tx_counter0;
#endif
//Kommandodefinitionen
//Channel Kommandos
#define note_off 0x80
#define note_on 0x90
#define key_touch 0xA0
#define control_change 0xB0
#define program_change 0xC0
#define keyboard_touch 0xD0
#define pitch_wheel 0xE0
//Poly Kommandos
#define sys_ex 0xF0
#define time_code 0xF1
#define song_pointer 0xF2
#define song_select 0xF3
#define ndef1 0xF4
#define ndef2 0xF5
#define tune_req 0xF6
#define endsys_ex 0xF7
//Realtime Kommandos
#define r_timing_clock 0xF8
#define r_ndef1 0xF9
#define r_start 0xFA
#define r_continue 0xFB
#define r_stop 0xFC
#define r-ndef2 0xFD
#define r_active_sensing 0xFE
#define r_system_reset 0xFF
//MiDi Variablen
volatile unsigned char uc_lastsend; //Letztes gesendetes Kommando
volatile unsigned char uc_lastrec1; //Letztes empfangenes Kommando Kanal 1
volatile unsigned char uc_lastrec2; //Letztes empfangenes Kommando Kanal 2
volatile unsigned char uc_lastrec3; //Letztes empfangenes Kommando Kanal 3
volatile unsigned char uc_lastrec4; //Letztes empfangenes Kommando Kanal 4
volatile unsigned char uc_sysex_state=0; //SYSTEM EXCLUSIVE Status 0=aus, 1=Kanal1, 2=Kanal2, 3=Kanal3, 4=Kanal4 + 10 = Ende
volatile bit ub_sensing; //Active Sensing am Output aktiv = 1
eeprom unsigned char ee_sensing=0;
//Display Variablen
volatile unsigned char uc_line1[22],uc_line2[22];
//Tastatur Variablen
//Statistik Variablen
volatile unsigned long int li_error1,li_error2,li_error3,li_error4;
volatile unsigned long int li_chan1,li_chan2,li_chan3,li_chan4;
volatile unsigned long int li_com1,li_com2,li_com3,li_com4;
volatile unsigned long int li_real1,li_real2,li_real3,li_real4;
//Puffer
volatile unsigned char uc_inbuffer1[3],uc_inbuffer2[3],uc_inbuffer3[3],uc_inbuffer4[3]; //Nachrichtenpuffer für die Eingänge
volatile unsigned char uc_inpointer1=0,uc_inpointer2=0,uc_inpointer3=0,uc _inpointer4=0; //Pointer für die Nachrichtenpuffer
volatile unsigned char uc_bufferlen1,uc_bufferlen2,uc_bufferlen3,uc_buffe rlen4; //Speicher für benötigte Pufferlänge
volatile unsigned char uc_sysex_buffer[1024]; //Puffer für MiDi Eingaben bei SYSTEM Exclusive Betrieb
volatile unsigned int ui_sysexinpointer; //Zeiger zum Einlesen von SYSTEM EXCLUSIVE Puffer Daten
volatile bit ub_sysex_overflow=0; //Sysex Puffer ist übergelaufen
// External Interrupt 0 service routine
interrupt [INT0] void ext_int0_isr(void)
{
// Place your code here
}
// External Interrupt 1 service routine
interrupt [INT1] void ext_int1_isr(void)
{
// Place your code here
}
#define RXB8 1
#define TXB8 0
#define UPE 2
#define OVR 3
#define FE 4
#define UDRE 5
#define RXC 7
#define FRAMING_ERROR (1<<FE)
#define PARITY_ERROR (1<<UPE)
#define DATA_OVERRUN (1<<OVR)
#define DATA_REGISTER_EMPTY (1<<UDRE)
#define RX_COMPLETE (1<<RXC)
// System Exclusive Puffer Einlesehandler
void sysexin(unsigned char uc_data)
{
if(ui_sysexinpointer<1024)
{
uc_sysex_buffer[ui_sysexinpointer]=uc_data;
ui_sysexinpointer++;
ub_sysex_overflow=0;
}
else
{
ub_sysex_overflow=1;
}
}
// USART0 Receiver interrupt service routine
interrupt [USART0_RXC] void usart0_rx_isr(void)
{
char status,data;
status=UCSR0A;
data=UDR0;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Place Code here
};
}
// USART0 Transmitter interrupt service routine
interrupt [USART0_TXC] void usart0_tx_isr(void)
{
if (tx_counter0)
{
--tx_counter0;
UDR0=tx_buffer0[tx_rd_index0];
if (++tx_rd_index0 == TX_BUFFER_SIZE0) tx_rd_index0=0;
};
}
#ifndef _DEBUG_TERMINAL_IO_
// Write a character to the USART0 Transmitter buffer
#define _ALTERNATE_PUTCHAR_
#pragma used+
void putchar(char c)
{
while (tx_counter0 == TX_BUFFER_SIZE0);
#asm("cli")
if (tx_counter0 || ((UCSR0A & DATA_REGISTER_EMPTY)==0))
{
tx_buffer0[tx_wr_index0]=c;
if (++tx_wr_index0 == TX_BUFFER_SIZE0) tx_wr_index0=0;
++tx_counter0;
}
else
UDR0=c;
#asm("sei")
}
#pragma used-
#endif
// USART1 Receiver interrupt service routine for Midi Input 2
interrupt [USART1_RXC] void usart1_rx_isr(void)
{
char status,data,uc_i;
status=UCSR1A;
data=UDR1;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Code hier
}
else
{
li_error2++;
}
}
// USART2 Receiver interrupt service routine
interrupt [USART2_RXC] void usart2_rx_isr(void)
{
char status,data;
status=UCSR2A;
data=UDR2;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Place Code here
};
}
// USART3 Receiver interrupt service routine
interrupt [USART3_RXC] void usart3_rx_isr(void)
{
char status,data,uc_i;
status=UCSR3A;
data=UDR3;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
//Code hier
}
else
{
li_error4++;
}
}
// Standard Input/Output functions
#include <stdio.h>
// Timer 0 overflow interrupt service routine
interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{
// Place your code here
}
// System Exclusive Puffer leeren und an die MiDi Out Schnittstelle ausgeben
void sendsysexbuffer(void)
{
unsigned int ui_sysexoutpointer; //Zeiger zum Auslesen von SYSTEM EXCLUSIVE Puffer Daten
for(ui_sysexoutpointer=0;ui_sysexinpointer>ui_sysexoutpointer;ui_sysexoutpointer++)
{
while(tx_counter0>=(TX_BUFFER_SIZE0-16)) //Warten bei vollem Sendepuffer
{
#asm("nop");
}
putchar(uc_sysex_buffer[ui_sysexoutpointer]);
if(ui_sysexinpointer<ui_sysexoutpointer+2)
{
#asm("cli"); //Falls nur noch ein Byte im Puffer ist Interrupts sperren
}
}
uc_sysex_state=0; //Am Ende den Sysex Puffer wieder umschalten
#asm("sei") //Interrupts wieder freigeben
ub_sysex_overflow=0; //Eventuell vorhandenes Overflow Bit löschen
}
void main(void)
{
// Declare your local variables here
// Crystal Oscillator division factor: 1
#pragma optsize-
CLKPR=0x80;
CLKPR=0x00;
#ifdef _OPTIMIZE_SIZE_
#pragma optsize+
#endif
// Input/Output Ports initialization
// Port A initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTA=0x00;
DDRA=0x00;
// Port B initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTB=0x00;
DDRB=0x00;
// Port C initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=P State2=P State1=P State0=P
PORTC=0x0F;
DDRC=0x00;
// Port D initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTD=0x00;
DDRD=0x00;
// Port E initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTE=0x00;
DDRE=0x00;
// Port F initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTF=0x00;
DDRF=0x00;
// Port G initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTG=0x00;
DDRG=0x00;
// Port H initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTH=0x00;
DDRH=0x00;
// Port J initialization
// Func7=In Func6=Out Func5=Out Func4=Out Func3=Out Func2=In Func1=In Func0=In
// State7=T State6=0 State5=0 State4=0 State3=0 State2=T State1=T State0=T
PORTJ=0x00;
DDRJ=0x78;
// Port K initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTK=0x00;
DDRK=0x00;
// Port L initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTL=0x00;
DDRL=0x00;
// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: 250,000 kHz
// Mode: Normal top=FFh
// OC0A output: Disconnected
// OC0B output: Disconnected
TCCR0A=0x00;
TCCR0B=0x03;
TCNT0=0x00;
OCR0A=0x00;
OCR0B=0x00;
// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: Timer 1 Stopped
// Mode: Normal top=FFFFh
// OC1A output: Discon.
// OC1B output: Discon.
// OC1C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR1A=0x00;
TCCR1B=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;
OCR1CH=0x00;
OCR1CL=0x00;
// Timer/Counter 2 initialization
// Clock source: System Clock
// Clock value: Timer 2 Stopped
// Mode: Normal top=FFh
// OC2A output: Disconnected
// OC2B output: Disconnected
ASSR=0x00;
TCCR2A=0x00;
TCCR2B=0x00;
TCNT2=0x00;
OCR2A=0x00;
OCR2B=0x00;
// Timer/Counter 3 initialization
// Clock source: System Clock
// Clock value: Timer 3 Stopped
// Mode: Normal top=FFFFh
// Noise Canceler: Off
// Input Capture on Falling Edge
// OC3A output: Discon.
// OC3B output: Discon.
// OC3C output: Discon.
// Timer 3 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR3A=0x00;
TCCR3B=0x00;
TCNT3H=0x00;
TCNT3L=0x00;
ICR3H=0x00;
ICR3L=0x00;
OCR3AH=0x00;
OCR3AL=0x00;
OCR3BH=0x00;
OCR3BL=0x00;
OCR3CH=0x00;
OCR3CL=0x00;
// Timer/Counter 4 initialization
// Clock source: System Clock
// Clock value: Timer 4 Stopped
// Mode: Normal top=FFFFh
// OC4A output: Discon.
// OC4B output: Discon.
// OC4C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 4 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR4A=0x00;
TCCR4B=0x00;
TCNT4H=0x00;
TCNT4L=0x00;
ICR4H=0x00;
ICR4L=0x00;
OCR4AH=0x00;
OCR4AL=0x00;
OCR4BH=0x00;
OCR4BL=0x00;
OCR4CH=0x00;
OCR4CL=0x00;
// Timer/Counter 5 initialization
// Clock source: System Clock
// Clock value: Timer 5 Stopped
// Mode: Normal top=FFFFh
// OC5A output: Discon.
// OC5B output: Discon.
// OC5C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 5 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR5A=0x00;
TCCR5B=0x00;
TCNT5H=0x00;
TCNT5L=0x00;
ICR5H=0x00;
ICR5L=0x00;
OCR5AH=0x00;
OCR5AL=0x00;
OCR5BH=0x00;
OCR5BL=0x00;
OCR5CH=0x00;
OCR5CL=0x00;
// External Interrupt(s) initialization
// INT0: On
// INT0 Mode: Rising Edge
// INT1: On
// INT1 Mode: Rising Edge
// INT2: Off
// INT3: Off
// INT4: Off
// INT5: Off
// INT6: Off
// INT7: Off
EICRA=0x0F;
EICRB=0x00;
EIMSK=0x03;
EIFR=0x03;
// PCINT0 interrupt: Off
// PCINT1 interrupt: Off
// PCINT2 interrupt: Off
// PCINT3 interrupt: Off
// PCINT4 interrupt: Off
// PCINT5 interrupt: Off
// PCINT6 interrupt: Off
// PCINT7 interrupt: Off
// PCINT8 interrupt: Off
// PCINT9 interrupt: Off
// PCINT10 interrupt: Off
// PCINT11 interrupt: Off
// PCINT12 interrupt: Off
// PCINT13 interrupt: Off
// PCINT14 interrupt: Off
// PCINT15 interrupt: Off
// PCINT16 interrupt: Off
// PCINT17 interrupt: Off
// PCINT18 interrupt: Off
// PCINT19 interrupt: Off
// PCINT20 interrupt: Off
// PCINT21 interrupt: Off
// PCINT22 interrupt: Off
// PCINT23 interrupt: Off
PCMSK0=0x00;
PCMSK1=0x00;
PCMSK2=0x00;
PCICR=0x00;
// Timer/Counter 0 Interrupt(s) initialization
TIMSK0=0x01;
// Timer/Counter 1 Interrupt(s) initialization
TIMSK1=0x00;
// Timer/Counter 2 Interrupt(s) initialization
TIMSK2=0x00;
// Timer/Counter 3 Interrupt(s) initialization
TIMSK3=0x00;
// Timer/Counter 4 Interrupt(s) initialization
TIMSK4=0x00;
// Timer/Counter 5 Interrupt(s) initialization
TIMSK5=0x00;
// USART0 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART0 Receiver: On
// USART0 Transmitter: On
// USART0 Mode: Asynchronous
// USART0 Baud Rate: 31250
UCSR0A=0x00;
UCSR0B=0xD8;
UCSR0C=0x06;
UBRR0H=0x00;
UBRR0L=0x1F;
// USART1 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART1 Receiver: On
// USART1 Transmitter: Off
// USART1 Mode: Asynchronous
// USART1 Baud Rate: 31250
UCSR1A=0x00;
UCSR1B=0x90;
UCSR1C=0x06;
UBRR1H=0x00;
UBRR1L=0x1F;
// USART2 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART2 Receiver: On
// USART2 Transmitter: Off
// USART2 Mode: Asynchronous
// USART2 Baud Rate: 31250
UCSR2A=0x00;
UCSR2B=0x90;
UCSR2C=0x06;
UBRR2H=0x00;
UBRR2L=0x1F;
// USART3 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART3 Receiver: On
// USART3 Transmitter: Off
// USART3 Mode: Asynchronous
// USART3 Baud Rate: 31250
UCSR3A=0x00;
UCSR3B=0x90;
UCSR3C=0x06;
UBRR3H=0x00;
UBRR3L=0x1F;
// Analog Comparator initialization
// Analog Comparator: Off
// Analog Comparator Input Capture by Timer/Counter 1: Off
ACSR=0x80;
ADCSRB=0x00;
// LCD module initialization
//lcd_init(20);
// Global enable interrupts
#asm("sei")
while (1)
{
if(uc_sysex_state>10)
{
sendsysexbuffer();
}
// Place your code here
};
}